An intermediate buffer in the storage control allows independent operations between the channel and the device.
2.
This means that for other memory areas, the data has to be transferred first by DMA from the I / O device to an intermediate buffer in the first 16 MiB of the physical address space, and then moved to the final memory by the CPU; or, in the other direction, it must be transferred from the initial memory to the intermediate buffer by the CPU before being transferred by DMA from that buffer to the I / O device.
3.
This means that for other memory areas, the data has to be transferred first by DMA from the I / O device to an intermediate buffer in the first 16 MiB of the physical address space, and then moved to the final memory by the CPU; or, in the other direction, it must be transferred from the initial memory to the intermediate buffer by the CPU before being transferred by DMA from that buffer to the I / O device.
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